1. Field of the Invention
The present invention relates to a semiconductor memory having a counter comparator for controlling the operation of a semiconductor memory circuit.
2. Description of the Related Art
Semiconductor memories which use dynamic memory cells require periodic refreshing in order to retain cell data. However, since such a conventional semiconductor memory executes a refreshing operation every time it receives a refresh request signal from an external unit, this may result in more refreshing operations being performed than are actually required by the memory, and unnecessary consumption of power current.
In a system employing a plurality of memories, a refresh request signal is generally supplied, without being decoded, from an external unit to all the memories contained therein, so that upon reception of this signal, all the memories in the system perform a refreshing operation, and a large amount of power current is consumed. If such a system has a battery as a backup power source voltage, the battery power supply will inevitably be quickly used up by such excessive power consumption. In addition, when the power source of the system is burdened by a high refreshing current, a power source noise may be generated, which may well result in the system malfunctioning.